1. Field of the Invention
This invention relates generally to charge coupled device image sensors and specifically to architectural implementations that enhance the short wavelength radiation response in TDI (time delay and integration) CCD sensors.
2. Description of Related Art
Charge-coupled devices (CCD) are metal insulator semiconductor (MIS) devices which belong to a general class of semiconductor devices that store and transfer information in the form of electrical charge. Charges in the CCD can either be electrically introduced, thermally generated, or photo-generated. The photosensitive property of the CCD is used in imaging applications.
There are three general classes of CCD imaging arrays: area arrays, linear arrays, and TDI (time delay and integration) arrays. An area CCD is comprised of a two-dimensional array of photoelements. Like a conventional analog camera, an area CCD captures snapshots of two-dimensional images. A linear CCD, on the other hand, is comprised of a one-dimensional array of photoelements. Linear arrays are usually used in applications where there is relative motion between the sensor and the source of the image. The linear array is oriented in the direction perpendicular to the direction of motion, and successively scans lines out of an area image. The lines can later be reconstructed to constitute the two-dimensional image. Like a linear array, a TDI array also scans successive lines of a two-dimensional image. Unlike a linear array and like an area array, however, a TDI array is comprised of a two-dimensional array of photoelements. A TDI array does not take snapshots of two-dimensional images. Instead, the vertical dimension of the TDI array is operated to transfer photogenerated charges within the array so as to follow the motion of the image source. Line outputs are then read out after the photocharges have tracked the image for some time.
The TDI concept is illustrated in FIGS. 9A, 9B and 9C. In FIG. 9A, a moving image source is projected onto a fixed TDI array. At time t1, section s1 of the two-dimensional image is imaged onto line l1 of the TDI array, while the next section, section s2, of the same two-dimensional image is imaged onto the next line, line l2, of the TDI array (see FIG. 9B). The pixel pitch of the TDI array (the center-to-center distance between l1 and l2) is denoted by p. If the image is moving relative to the TDI array at a velocity v, then at time t2 (t2=t1+p/v) section s1 will be imaged onto line l2 of the TDI array, while section s2 will be imaged onto line l3 of the TDI array (see FIG. 9C). The TDI array is clocked in a fashion such that the photogenerated charges that correspond to each section of the image follow the image along the array. Line data are read out after charges have integrated for a specified number of stages.
There are three main types of photoelements out of which such arrays are made: p-n junction photodiodes, photogates, and pinned photodiodes. A p-n junction photodiode is merely a reversed-biased p-n junction diode. In CCDs, the potential of the p side of the diode (e.g., a lightly doped p type substrate) is fixed, usually by the bias applied to the silicon substrate. The bias on the n side of the diode (e.g., an n type implant in the substrate) is either floating or is set prior to photocharge integration by an adjacent gate through which a predetermined voltage has been applied. The reversed biased diode forms a depletion layer between the p side and the n side. Photogenerated electrons are swept by an electric field in the depletion layer of the diode to the n region (due to its positive bias), where they are either temporarily stored or transferred to an adjacent gate. Photogenerated holes are usually swept to the substrate.
A photogate is essentially a sandwich comprised of an electrode layer, an insulator (e.g., silicon oxide and/or silicon nitride), and a semiconductor (e.g., lightly doped silicon). When an appropriate bias is applied to a poly-crystalline silicon gate electrode (called a polysilicon gate electrode) with respect to the semiconductor, a potential well forms in the semiconductor. For example, a positive potential with respect to the semiconductor may be applied to a polysilicon gate electrode insulatively spaced over a lightly doped n type semiconductor. The positive potential repels negative charges in the conduction band of the semiconductor and induces a positive potential well beneath the gate electrode. Photogenerated charges are collected in this potential well.
In many CCDs, photogates include a doped semiconductor layer between the insulator and the semiconductor substrate. For example, an n type implant layer may be formed on a surface of a lightly doped p type semiconductor substrate. A positive potential with respect to the p type semiconductor substrate may be applied to a polysilicon gate electrode insulatively spaced over the n type implant. The positive potential induces a positive potential well beneath the gate electrode that is buried under the gate electrode so that the potential well is separated from the insulator interface by a potential barrier. Because the potential well is buried in the semiconductor, such photogates are commonly referred to as buried-channel photogates.
The maximum potential in the collecting well is a function of the gate bias. As the gate bias increases, the maximum potential in the collecting well normally also increases by approximately the same amount. In buried-channel photogates however, when the gate bias is sufficiently negative, electrons in the n implant are repelled and a layer of holes will form at the insulator-semiconductor interface. When this occurs, biasing the gate even more negatively will have virtually no effect on the collecting well potential since the layer of holes shields the electric field from the substrate. At this point, the photogate is said to be xe2x80x9cpinnedxe2x80x9d. Pinned photodiodes are similar to pinned photogates, with the exception that the layer of holes is implanted rather than induced by a gate potential.
In area and TDI CCD sensors formed with photogates, a pixel will ordinarily have two, three or four photogates architected so that the gate electrodes are coupled to respective two, three or four phase clocking signals.
The spectral response of photoelements depends on whether the photoelement is a photodiode or a photogate. In silicon based image sensors, spectral response in the silicon typically peaks at the red, yellow or green spectrum, and levels off both at the longer infrared wavelengths and at the shorter blue and ultra-violet wavelengths. FIG. 10 is a typical plot of the quantum efficiency (the proportion of photogenerated charge collected by the CCD) as a function of wavelength. Photons are absorbed in the semiconductor at a distance determined by the absorption depth in the material for given wavelength. At shorter wavelengths, most absorption occurs either close to the semiconductor surface or in overlying layers such as the polysilicon electrodes. Because most of these electrons do not reach the CCD photoelement collecting well, quantum efficiency is poorer at short wavelengths than at long wavelengths. At 400 nm, for example, the average absorption depth of photons in silicon is only 200 nm. This is thinner than the typical polysilicon layers, and as a result, the short wavelength response of photogates will suffer relative to the response achieved with photodiodes. The quantum efficiency is lower in the infrared because the energy (E=hxcexd) of the photons tapers off at longer wavelengths. In the near infrared spectrum, some loss in quantum efficiency also occurs due to loss of electrons that are generated beyond the depletion region of the collection well. These electrons either diffuse to the substrate or recombine with holes. Silicon is mostly transparent to incoming photons with wavelengths greater than 1,100 nm.
In photogate CCDs, a large fraction of the surface of the photoelement is covered by the polysilicon layer of the photogates. Charges photogenerated by short wavelength radiation are absorbed by the polysilicon layer and do not reach the collection well. CCD arrays that use p-n junction or pinned photodiodes do not have overlying polysilicon layers over the photosensitive region and hence have better short wavelength (i.e., blue) response than photogate-based CCDs.
Area CCD sensors fall into two general categories: interline transfer (ILT) and frame transfer (FT) CCD sensors. FT CCD sensors generally employ photogates and ILT CCD sensors generally employ photodiodes. Hence FT CCD sensors will normally have poorer blue response than ILT CCD sensors. However, because clock and readout buses needed to reach each photodiode (e.g., for operation of transfer gates) in an ILT CCD sensor, the fill factor (the proportion of the area of each photoelement that is actually photosensitive) of an ILT CCD sensor is smaller than the fill factor of a FT CCD sensor. Consequently, the ratio of the blue to the peak response is usually better in an ILT CCD sensor than in a FT CCD sensor, but the peak response is poorer.
There are FT CCD sensors with photosensitive photoelements (i.e., pixels) that are partly comprised of photogates and partly comprised of pinned photodiodes. These usually have better blue response than FT CCD pixels that are comprised entirely of photogates. In a first variation of this part photogate and part pinned photodiode FT CCD photoelement, at least one of the photogates in each pixel is replaced by a pinned photodiode. For example, in what would ordinarily be a three phase photogate pixel (i.e., having three photogates per pixel), one of the photogates may be replaced by a pinned photodiode. In a second variation of this part photogate and part pinned photodiode FT CCD photoelement, a portion of each photogate is replaced by a pinned photodiode. In what would ordinarily be a three phase photogate pixel (i.e., having three photogates per pixel), the part of each photogate at the outside edges may be replaced with pinned photodiodes.
Linear CCD arrays generally use photodiodes (either p-n junction or pinned) as the photoelement, and hence, linear arrays generally exhibit improved blue and peak responses when compared to area type CCD sensors (both FT and ILT). However, TDI CCD sensors either use photogates exclusively or use photogates in combination with pinned photodiodes. A p-n junction photodiode is generally not used since this would complicate the process of tracking the accumulating image charges with the moving image. A TDI sensor array integrates charges for a number of stages (e.g., n stages), and therefore, the TDI sensor has an improved total response (e.g., n times greater total response when there are n stages) when compared to a similar area sensor array or a simple linear array. Since TDI photoelements are at least partly comprised of photogates, the ratio of the blue to the peak response of a single TDI stage is less than the ratio of the blue to the peak response of linear CCD sensors with a linear array of photodiodes. If the number of stages (n) is sufficiently large as is usually the case, the total response of a TDI sensor array can be made many times the total response of a linear sensor array.
In typical FT and TDI CCD sensors, the photoelements are organized in columns of channels that are separated from each other by channel stops disposed between the channels. Signal charges are transferable up and down the columns. The channel stops need to be deeper than the charge collection region of the photoelements in order to isolate adjacent columns of photoelements. There are various ways of implementing the channel stops. The channel stops may merely be formed of a deep p+ implant. In LOCOS processes, the channel stops can be comprised of a p+ layer implanted beneath a field oxide. The channel stops can also be insulator trenches which can be surrounded by a p doped shell.
Photocharges are not only generated in the photogate or photodiode, but are also generated in and underneath the channel stops. If the CCD process and pixel design are properly optimized, photocharges generated in the vicinity of the channel stops can be collected by adjacent photoelements. Photogates of the pixels are clocked to transfer charges up and down the columns, and the polysilicon electrodes of the photogates are needed to induce the potential wells only in the channel within the center of a column. Since there is no need for the polysilicon layers to cover the channel stop in FT area CCD sensors and TDI CCD sensors, a portion of the polysilicon over the channel stop can be removed to enhance the short wavelength response. When portions of the polysilicon clock conductors (i.e., buses) are removed, the pixel is said to be xe2x80x9creticulatedxe2x80x9d. The holes in the polysilicon are called reticulation holes. In general, a larger reticulation hole improves the short wavelength response relative to a smaller reticulation hole. However, the larger reticulation hole leaves a smaller remaining pixel area for use as a photogate, and therefore, a smaller charge carrying capacity in the column.
The subject of this invention is a TDI array architecture that circumvents the compromises ordinarily made between the charge handling capacity of the pixel column and the short wavelength response of the pixels (i.e., driven by the area of the pinned photodiode exposed through the reticulation in the pixel). The invention further provides a method of bussing clock signals to the photosites that optimizes both the line rate (i.e., clock rate) in TDI arrays and the short wavelength response.
It is an object to the present invention to enhance the blue wavelength response of a TDI sensor while maintaining a high charge carrying capacity for the sensor. It is a further object of the present invention to provide metal strapping of the clock bus structure to ensure high speed operation.
These and other objects are achieved in a TDI sensor that includes a column of pixels ordered from an initial pixel to a final pixel where each pixel includes reticulated clock conductors arranged to define a reticulation area and a pixel charge handling capacity. The reticulation area of a pixel increases from the final pixel to the initial pixel, and the pixel charge handling capacity increases from the initial pixel to the final pixel. The sensor includes a first bus structure of polysilicon, where the bus structure includes register element sets and each register element set includes a plurality of clock conductors. Each register element set includes a corresponding pixel reticulation area, and the pixel reticulation area of a first register element set is unequal to a pixel reticulation area of another register element set.
The sensor also includes a second bus structure of metal disposed substantially diagonally to the first bus structure. The second bus structure includes clock bus sets, and each clock bus set includes bus conductors. A first bus conductor of a first clock bus set includes parallel segments, and each parallel segment is co-parallel to the first bus structure. A first clock conductor of each register element set extends in an elongate direction and defines a predetermined clock conductor length in a direction perpendicular to the elongate direction. The first clock conductor of each register element set includes a first bridge segment having a predetermined bridge segment length in the direction perpendicular to the elongate direction, the predetermined clock conductor length being greater than the predetermined bridge segment length. A first parallel segment of the first bus conductor of each clock bus set is disposed over the first bridge segment of the first clock conductor of a corresponding set of the plurality of register element sets and connected thereto with a contact.